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Forum Post: RE: Errors #17003-D, #10015-D and #10281-D appearing out-of-the-blue

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[quote user="Remco Poelstra"]Why is STATIC_BASE located at SHDSPL2RAM?[/quote]

What makes you say that?  STATIC_BASE should be in SHRAM.  Please post your map file.

[quote user="Remco Poelstra"]Do I have to define ALL variables as far?[/quote]

No.

[quote user="Remco Poelstra"]Or only regionID and __newPreset[/quote]

Maybe, but probably not.

[quote user="Remco Poelstra"]regionID is inside a TI library. How do I define it as far?[/quote]

If it is in an object library that you cannot rebuild, then you can't.

[quote user="Remco Poelstra"]Does declaring as far imply a performance penalty?[/quote]

Yes.  Though it may not be much of a performance penalty.

Thanks and regards,

-George


Forum Post: RE: RE: CCS 5.3 Create Project Error for evmOMAPL138 hello example

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Hello Yin,

What device are you building for? Judging from the error (reference to Grace), I am guessing that it is an MSP430 of some sort.

Could you also provide the project (or a test case that can reproduce the issue)?

And also see if updating your CCSv5 version helps.

Thanks

ki

Forum Post: RE: CCS V5= Trouble Writing Memory Block

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Hello,

[quote user="Simon 14448"]

after a while It stops and I get this message:

C64XP_0: Trouble Writing Memory Block at 0x83d48600 on Page 0 of Length 0xc: Error 0x00000002/-1177 Error during: Memory, The HW memory system has generated an fault condition for the IM memory request specified. This could be caused by incorrect access size or mis-aligned memory address.

[/quote]

Note that it is very difficult to provide any suggestions for this kind of issue with more details. Would it be possible to provide a reproducible test case? And are you using the 6424 EVM or is it a custom board?

[quote user="Simon 14448"]It seems to be linked to a problem that  I can see in release mode, that implies an unexpected stop in one of my task after a non constant time.[/quote]

Do you mean that it is the release configuration of your project that exhibits this error while the debug configuration does not?

Thanks

ki

Forum Post: RE: Interrupt keyword does not save context of STF register when --float_support=fpu32 flag is used for compiling.

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[quote user="James lOCKWOOD"]3e0140:   A8BD        MOVL         *SP++, XAR4
3e0141:   A0BD        MOVL         *SP++, XAR5
3e0142:   C2BD        MOVL         *SP++, XAR6
3e0143:   C3BD        MOVL         *SP++, XAR7[/quote]

These instructions save all 32-bits of the XARn registers.  See page 6-210 of the C28x CPU manual (revision E).

Thanks and regards,

-George

Forum Post: RE: Migrating CCSv3.3 example project to CCSv6

Forum Post: RE: Count Event Question

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AETLib comes to mind but you mentioned you don't want to add any extra lines of code to you application. You may be able to use the ctools scripting APIs, i'll need to check with some folks here. What exactly are you looking to do? Is it simply counting the number of times a program address was reached? Or are you looking to do something more?

Forum Post: RE: Count Event Question

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My immediate concern is to count the number of times a program address was reached.

But if the hardware has the capability to help with more complex issues in the future, learning how to implement this counter with AET can be helpful.

Forum Post: RE: Linker errors with GCC in CCS6.0.1

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Andy,

What device are you building for?
Can you post the complete output of the build that appears in the CCS build console?


Forum Post: RE: WEBENCH FILES

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Hi Fernando,

Sorry for the delay response.  

As I suspected, your design had two custom components, L1 and Rsense. I will try substitute some real components into the schematic and will get you the translated P-Cad file within a day or two.

Forum Post: RE: use CCS to program eMMC on the Beaglebone Black via JTAG

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[quote user="SHU LIU"]Thanks for your links. So mostly likely, the CCS can not do the flashing to the eMMC. If there is any other ways, please let me know. [/quote]

Sure Shu. I had a chat with Mr. BeagleBone (Jason Kridner) himself couple of months back and received the same reply :)

Regards,

Gautam

Forum Post: RE: msp430F5509 not recognized in ccs V5

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Dear Gautam,

thanks for the reply i will test it on monday without the 47K and the 330R resistors and add the 2.2 nF cap which was missing.

Dave

Forum Post: RE: Errors #17003-D, #10015-D and #10281-D appearing out-of-the-blue

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I checked the working project and there STATIC_BASE is indeed located inside SHRAM.

Regards,


Remco

Forum Post: 'Load memory' ruins debug session

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Hi,

I've a global variable in DDR memory, which I want to initialize using the 'Load memory' function (eventually using AIS). Unfortunately the debugger gets wrong after loading the data. Here is what I do:

  1. I pause the program just before accessing the variable.
  2. I check using the memory viewer the contents of the memory (all zero's)
  3. I use 'load program' to load a bin file at location 0xc0000000 (start of DDR)
  4. The memory viewer shows that the file is correctly loaded, all data is there
  5. The debugger now suggests that the program counter is also at 0xc0000000 and only restarting the debug session allows me to do anything. The restart button is also greyed out.

Why is it that loading memory conflicts with the debug session?


I've added two images showing before and after the 'load memory' command.

Kind regards,

Remco Poelstra

Forum Post: RE: Interrupt keyword does not save context of STF register when --float_support=fpu32 flag is used for compiling.

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I have to assume I must have been doing something wrong until I can reproduce the problem and be sure that I used the interrupt keyword in every driver that was used.

I created my context save and restore macros based upon what I had disassembled, but it is now evident that the code that the compiler creates for the context save and restore varies based upon the compiler flags used and whatever optimizations the compiler implements.

Thanks for your help.

Forum Post: RE: app center not working

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Changing default internal browser to external browser worked for me.

Window->Preferences->General->Web Browser-> use external.

thanks all.


Forum Post: RE: CCS 6.0.1.00040 and GRACE on Ubuntu 14.04 Breaks App Center and GRACE does not work

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Log showed that libnss3 was not installed. I installed the i386 version of it. Now App Center will work after GRACE. Help info also shows GRACE module installed. App Center also says GRACE is up to date. There is no option to generate a new GRACE project available in the new project generator.

The relevant log is attached.

Forum Post: Trying to install GRACE standalone on XPSP3

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What registry key do I need to change to get past this? The system is an XP system with the latest updates, so obviously it is SP3.

Forum Post: RE: How can I simulate TPS71501 into TINA?

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Thank you very much for your asistance Nikhil, this is what I was looking for. And I will also take a look into webench.

Best regards.

 

Forum Post: RE: WEBENCH FILES

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Okay,
But will always have this error?
You will send the file to P-cad or alteration project?

Forum Post: RE: TPS40170-EP PSPICE model

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Hi Joe,

We have a very easy way to create Schematics and Board Layout in Altium. If you go to the TPS40170 product folder, you will see a WEBENCH Panel on the right where you can create a custom design for your system. Once you create this design, you can go through an optional step to optimize your design for key needs like Efficiency, Cost or Size. Once you have your final solution, you can click on the "Export" button on the top which will allow you to download the schematic and board layout for your custom design into popular CAD formats including Altium. 

Please give it a shot and let me know if you need any further assistance.

Thanks,

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