Forum Post: System and User mode registers are missing in CCS debugger when in other mode

Hi,

Below is the full map of ARMv7 registers (including banked):

When the CPU is halted for debug in IRQ mode, the SP/LR/SPSR that CCS shows in the "Core Registers" sections are actually the SP_IRQ, LR_IRQ and SPSR_IRQ. But where can I see the SP_USR, LR_USR and CPSR when halted in IRQ mode?

Best regards,
Vasili

P.S. I found this thread. But it does not seem to answer my question.