Hi Lisa,
Either CCE_INSTALL_ROOT and CCS_INSTALL_ROOT will be able to make .bin file if I delete all files at the Release folder. If there are contents at Release folder, .bin file will not be generated. I confirmed several times. Why is that?
- kel
Hi Lisa,
Either CCE_INSTALL_ROOT and CCS_INSTALL_ROOT will be able to make .bin file if I delete all files at the Release folder. If there are contents at Release folder, .bin file will not be generated. I confirmed several times. Why is that?
- kel
Could you please help out?
Moving this to the CCS forum.
Hi, thanks for your prompt answer.
The compiler complaint about "not finding definitions in files" and the directories seems to be all right.
I updated the Control Suite software to the last version and I am using CCS 6.01.
I think you can see it if you open CCS6.01, import the HV_SOLAR_DC_DC project and try to build it. I can import pretty much everything from the examples and built right from the get go but not for this particular project. Can you check if it compiles after the import?
Thanks.
Regis.
Julian,
I think the problem is a more general problem and not entirely related to CCS. Let me try to explain:
A compiler in an IDE looks for all source code files in a project (*.c and/or *.asm) and tries to compile /assemble them into object files. A header-file (*.h) is dealt with differently, as it is no source code file in close sense. A header file usually contains only prototypes, decalartions of data types, #defines etc - in summary nothing that leads to object code. Therefore a *.h - File, added to a project (copied or linked) will not be touched by the compler.
If a C-file has a #include *.h statement - the pre-compiler is forced to search that file - and therfore we have to provide the correct include search paths.
In your last post you spoke about addiing library files (.c &..h). These two file types have nothing to do with library files - a library file is a *.lib file. Such a precompiled library - object (*.lib) will be added by the Linker to the final machine code. So if a *.lib file is part of a project, let it be copied or linked, it will be dealt with by the Linker. If other parts of the project call a library function, this machine code function will be taken from the lib-file and added to the final machine code. To be able for your code to call a library function, you will need to provide another header-file, again by using a #include in one of your c-code files and a correct setup of the include search path.
Best Regards
Frank
I have a paid active CCSv5 license file. According to http://processors.wiki.ti.com/index.php/Licensing_-_CCSv6 I should be able to upgrade it from the manage menu. But the menu consists of "Download Full Product", "Get Updates", "Get a Replacement License" and "Re-Host a License". It seems that none of it can be used to upgrade the license. How can I upgrade my license?
Si,
I was able to display all 20 tasks, but on my CCSv6.0.1. I was initially able to display only a handful of tasks, but after increasing the number of MAUs of both RTOS Load Events and Execution Events I was able to properly display everything. Check the screenshot below:
Perhaps that is what is missing in your system.
Hope this helps,
Rafael
Ben,
I was not able to reproduce this issue with my LM4F232 kit; both my CCSv5.5 and 6.0.0 work just fine with run/halt and terminate, etc.
The best idea I have is to double-check sections 3 and 4 of the Troubleshooting page at:
http://processors.wiki.ti.com/index.php/Troubleshooting_CCSv5
In the meantime, I will keep trying to "break" my setup...
Rafael
Hi,
This message stems from the fact your project does not have UIA (Unified Instrumentation Architecture), which is different than the built-in DSP/BIOS analysis tools.
Unfortunately the combination of tools you are using is not the most favourable. DSP/BIOS does not support UIA. UIA does not support C55x devices. CCSv6 dropped support for the RTA Legacy tools (the analysis tools for DSP/BIOS releases, available in CCSv5.5).
For this combination of features (DSP/BIOS and CCSv6.x), your only analysis option is the RTOS Object View (ROV).
Hope this helps,
Rafael
[quote user="Venkatesh a"]. It was just re organization of the statement/code line containing division operation. and division was applicable to any number but mostly integer. [/quote]
From your description, I doubt this is TI-specific. There are lots of standard techniques for optimizing divisions, but I don't really have enough clues to identify the optimization you are looking for, particularly because you imply that it also works for floating point division, which has very different properties. Are you dividing by a constant? Any other details would be helpful when searching for this technique.
The best optimization is to not do the division at all. Why do you need the division? Move divisions out of loops. If you have a choice of divisor, divide by powers of two. Try not to divide by variables. I'm sure there are many more tips.
Ivgeni,
These "security violation" issues are usually caused by a problem in the processor power - check the two threads below:
http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/233751.aspx
http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/321020.aspx
The reason why the emulator throws an apparent misleading error is because, from a pure JTAG standpoint, the issue behaves exactly like devices that have security features enabled - i.e., prevent JTAG access to specific cores.
I strongly suggest double-checking the power rails on your EVM board and, if necessary, try a different board.
Hope this helps,
Rafael
I cannot for the life of me debug an Energia (0101E0012) sketch in CCS (6.0.1.00040), targeted for TM4C1294NCPDT (the EK-TM4C1294XL launchpad). The sketch appears to run fine from Energia, and when imported into CCS, it compiles and (appears to) flash just fine with no errors, but it doesn't run. A breakpoint set at the first line of setup() is never hit, and clicking “pause” while debugging prints the message “CORTEX_M4_0: Error: Debug Port error occurred.”, and the stack frame (I think? I'm kind of new to this) is at “_free_r() [C:\path\to\file.out] at 0xFFFFFFFE”. The memory map also shows such helpful information as
fffffffe: ???? Memory map prevented reading 0xFFFFFFFE [code=0x20000]
100000000: ???? Invalid target memory access
100000002: ???? Invalid target memory access
100000004: ???? Invalid target memory access
100000006: ???? Invalid target memory access
100000008: ???? Invalid target memory access
10000000a: ???? Invalid target memory access
10000000c: ???? Invalid target memory access
10000000e: ???? Invalid target memory access
100000010: ???? Invalid target memory access
Clicking “View Disassembly” makes the page in CCS sort of “flash” but otherwise does nothing.
I would greatly appreciate any help with this issue.
P.S. I’m running everything on Windows 7 Pro SP1 x64. The Stellaris ICDI drivers are installed and working, as evidenced by the code running straight from Energia. TivaWare example projects from CCS also run fine. But I would much prefer to use the Energia API, as the base C code looks fairly impenetrable to me (as I said, I’m no expert).
[quote user="Paul Raine"]Is it possible to add that support to my version of CCS, or do I have to upgrade to a newer version of CCS?[/quote]
You need at least CCSv5.3. I would upgrade your CCS version to the latest CCSv5 version (5.5). Note that for the connection type, you would use the" Texas Instruments XDS2XX" option for all XDS200 based emulators, regardless of the vendor, since they all will use TI's drivers.
[quote user="Paul Raine"]....In the case that I have to upgrade, can I transfer my license file? How do I do this? Is it a simple automatic upgrade or do I need to uninstall my current version and then install the new version?[/quote]
You use the same license for for all v5 updates. There is nothing you need to do regarding licensing. You can run the Update Manager:
http://processors.wiki.ti.com/index.php/Updating_CCSv5
thanks
ki
Hi Jo-Jo
great, thanks for the update and happy to hear.
All the best with the msp!
Best regards,
Lisa
Here is what I think is occurring. With the TI ARM compiler, when you use the options ...
-mv7M4 --float_support=FPv4SPD16
The object files are marked with the build attribute
Tag_ABI_VFP_args 1 (FP arguments are passed using the VFP register argument variant of the AAPCS)
The GCC ARM compiler library build uses the options ...
-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4
So it should also use the build attribute Tag_ABI_VFP_args and set it to the value 1. But it doesn't use that attribute at all. By convention, this means the attribute has the value 0.
My guess is the files actually are compatible, but because this attribute does not match, the linker issues the error diagnostic.
This all points to a problem with the GCC compiler. Which GCC compiler is being used?
Here is a short term workaround I do not recommend for use in your production build ... Suppress the diagnostic by adding --diag_suppress=16004 to the linker build options.
Thanks and regards,
-George
Hi Ki,
I confirmed that just by deleting the .out file will generate a new .bin file after build.
- kel
Thanks for the answer.
Am I to assume there is no way to load a program into flash memory using CCS? If that's true, this is the first IDE I have ever used that didn't just have a button on the toolbar, or something similar.
Is there really no way to load code into a device flash memory using CCS?
[quote user="Ben Dumas"]I did not see this dialog when I tried to debug. Where in CCS6 can I see this dialog? [/quote]That dialog only appears the first time you debug a project when the CPU(s) to load the project on haven't been specified. To be honest, after starting the initial debug I haven't found out how to get that exact dialog displayed again.
The other thing to check is to use Run -> Debug Configurations and display the Main tab for the project. E.g.:
For a StarterWare project only the CortexA8 should be ticked.
Andy,
The model on the web is for the fixed 2.5V version of the device. It is documented in the TINA-TI reference design. We should probably add the adjustible version to the product folder. This is a case where there are many fixed voltage versions and the adjustable voltage version in the same product folder.
You can also simulate the device in the WEBENCH® Power Designer for all of the fixed voltage versions as well as voltage values where there is not a fixed voltage version.
Britt