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Forum Post: RE: Question regarding CCS v6 command line

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Patrick,

Do you mean building projects using the APIs from this page, right? If so, I never tested this, but I expect it not to work. 

What happens if you suppress the -data parameter? Does it build fine or you get an error? That would quickly verify this.

Regards,

Rafael


Forum Post: Cpu load does not work on Linux box

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I am using a linux Ubuntu version 12.04.5

I tried to use the cpu load toold that is available in code composer version 5.5

I use the TMS320C5505 and the Texas Intruments XDS100v2 USB Emulator, Compiler Version TI v4.4.1, DSP BIOS version 5.42.1.09

I selected CPU Load from the Menu: 

Tools =>  RTOS Analyzer => RTA (Legacy) => CPU Load 

My program was running, the CPU Load graph was displayed,  but the the CPU Load was not displayed on the graph.

Any help would be appriciated.

Forum Post: RE: LM3429 Spice Model

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I've used the LED Architect to design my CC power supply using LM3429. I want to download into Altium Designer using the Webench simulation engine plug-in but when I export, there is no option for simulation. Just Schematic. What's the dillio?

Should Be:

What I see.....

Forum Post: RE: DSS logging “GEL_TextOut” to a file

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Yes you are right, and presently I am using the "GEL_EnableFileOutput()" but issue is I am calling the GEL funtion in DSS script and want to log the results for various external parameters, so I will call the same gel file for different other settings thus I need to change the log file name accordingly.

with "GEL_EnableFileOutput()" I can't have the file name as variable !

 

Reagrds,

Karthi

 

Forum Post: GUI composer capability

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I have the C2000 board connected to a PC host computer through USB.  I am using GUI composer  for motorware on the PC side.   I have 2 questions:

-           Can we adapt the GUI composer to  support CAN communication and Ethernet communication ? and how to do it?

-          The GUI template runs with Motorware. Our platform is different:  we have a command processor (Master) which communicate and command  3 Motor processors (slaves).   Can we adapt the GUI composer to run with the command processor and not directly with the motors through Motorware as illustrated in the TI example?

 Thank you.

Forum Post: Supported CRC algorithms by the TI ARM linker

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The lib/src/crc_tbl.h which comes with TI ARM compiler v5.1.7 and the ARM Assembly Language Tools v5.1 User's Guide SPNU118L both report that the only supported CRC algorithm for the ARM linker is "TMS570_CRC64_ISO".

However, I found that the TI ARM v5.1.7 linker will also accept a CRC algorithm type of CRC32_PRIME, CRC16_802_15_4, CRC16_ALT or CRC32_C. These CRC algorithms are useful since they match the available algorithms in the CRC hardware module of Tiva TM4C129 devices.

Should the ARM Assembly Language Tool User's Guide and ARM RTS lib/src/crc_tbl.h be updated to describe these CRC algorithms, or are they not officially supported?

Forum Post: RE: CCS 6.0 crashes during launch (An error occurred. See log file)

Forum Post: RE: How to get .text section size at run time using CCS 5.1 on TM4C129x?

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[quote user="Petrei"]A possible alternative - look for spnu118k.pdf - ARM Assembly Tools v5.0.pdf - paragraph 7.9 shows up how to.

7.9

7.9.1

Linker-Generated CRC Tables

The linker supports an extension to the link command file syntax that enables the verification of code or data by means of a CRC. The linker computes a CRC value for the specified region at link time, and stores that value in target memory such that it is accessible at boot or run time. The application code can then compute the CRC for that region and ensure that the value matches the linker-computed value. The run-time-support library does not supply a routine to calculate CRC values at boot or run time. ....

Petrei[/quote]The linker generated CRC value sounds a good idea, since it means the user doesn't have to compute and insert a "checksum" into the image.

While the ARM Assembly Language Tools v5.1 User's Guide SPNU118L mentions that the linker only supports a CRC algorithm type of TMS570_CRC64_ISO and the user needs to create their own code to calculate CRC values, found that the linker in TI ARM compiler v5.1.7 actually also supports CRC algorithms of type CRC32_PRIME, CRC16_802_15_4, CRC16_ALT or CRC32_C. These types are supported by the CRC module inside the Tiva TM4C129 devices, which means TivaWare can be used to calculate a "actual" CRC value for a segment which can be compared against the "expected" CRC calculated by the linker.

The attached (Please visit the site to view this file) is a CCSv6 project for a TM4C1294NCPDT which uses the linker to generate 4 different CRC algorithms on different segments in flash and use TivaWare to calculate the actual CRC values, which in a test of not injecting errors were reported as a match:

[quote]CRC32_PRIME actual CRC=0xdb245516, expected CRC=0xdb245516
CRC32_C actual CRC=0x28b2f07a, expected CRC=0x28b2f07a
CRC16_802_15_4 actual CRC=0x8fad, expected CRC=0x8fad
CRC16_ALT actual CRC=0x206c, expected CRC=0x206c[/quote]


Forum Post: RE: CC3200 LaunchPad kit debugger issue with CCS v6

Forum Post: Blinky runs much faster debugged over a USB 3 port (c.f. USB 2)

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Hi there,

I have an interesting observation and would like to know why this happens.

Setup is CCS v5.4 via USB3 port to Tiva TM4C129X Development Kit.  I debug the Blinky project.  the green LED (D12) flashes very fast (say about 10-15Hz).  

when I repeat this with a USB 2 port on the same PC it flashes at a much slower rate (about 2Hz).

the period of the flash is set by the following loop.

for(ui32Loop = 0; ui32Loop < 200000; ui32Loop++){}

Is attaching the debugger really meant to introduce such a significant delay between each instruction ? Presuming USB 3  coms rate is much faster than USB 2

Forum Post: RE: device Examples

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Thanks Very much,That's I want,Tks

Forum Post: RE: Supported CRC algorithms by the TI ARM linker

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I have asked for some help with your question.  I expect you'll hear something today or tomorrow.

Thanks and regards,

-George

Forum Post: RE: How to solve this it doesn't compile this c plus program.PLEASE HELP ME

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It builds clean for me.  Which compiler are you using?  What version?  What build options?

Thanks and regards,

-George

Forum Post: Question related to adjust output voltage of TPS61040

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Hi,

Currently i need a boost converter that has the functionality of controlling the output voltage. I know TPS61045 has a digital control pin for me to adjust the output voltage. However, the process of dropping the voltage by 6 bits takes too long for my application.(140us per step drop). I have decided to use TPS61040 with a DAC beside to adjust the output voltage. Right now, my only concern is if I suddenly drop the FB voltage from 1.233V to 0V or increase it rapidly, would it causes any damage to the ic chip. I am guessing there is a reason behind designing TPS61045 to drop the voltage slowly.Thanks for your help.

Just another note. I might be changing the output voltage quite often with large scale(changing it by 3V).

Forum Post: RE: CCS Installation

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I've never seen this.  But it looks like you don't have enough disk space.

Thanks and regards,

-George


Forum Post: RE: Linux CCS6 MSP430 TI compiler ELF or COFF output to binary?

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In defense of Mr. Hendrawan, a binary file is more of a concept than a specification.  Most people usually mean a binary file as produced by the Unix utility objcopy.  I presume that is what you mean here.

The utility tiobj2bin from the cg_xml package can create a binary file from a COFF executable file.

Thanks and regards,

-George

Forum Post: RE: Build fails when trying to build legacy ccs 3.3 project in ccs 4.1

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Hi, 

I upgrade code composer from v3.3 to v5 and imported the project using "import from legacy ccsv3.3. The project compiled successfully with older version but v5 gives me memory problem. 

#10099-D program will not fit into available memory. run placement with alignment/blocking fails for section "CpuTimer1RegsFile"
Snapshot looks like this

Can you tell me solution to this?

Thanks

Forum Post: RE: Variables in FRAM - not recognized by CCS? RAM usage doesn't change

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You say you are looking at "expected RAM usage."  Is it the CCS IDE telling you this number, or are you looking at the result of the linker?

Are you using EABI or COFF?  If you don't know, please show us your complete compilation options.

Forum Post: RE: RE: MOSFET in Linear Region

Forum Post: RE: CCS 5.5 Arm Cortex M3 Software download not possible

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Hi Franz,

I spoke with a colleague and it appears we have seen similar scenarios when something on the JTAG communications channel makes the emulator believe it is connected to the device but in fact it is not (thus the appearance of not being connected at all).

 

The fact you are using a Stellaris M3 makes me think of section 3 of the wiki page below, where some of their boards did not have the RTCK routed back to the TCK pins, which can potentially cause this.

http://processors.wiki.ti.com/index.php/JTAG_configuration_for_CCS_and_Stellaris

 

Despite in principle the page above is applicable to XDS510 emulators, I don’t know if this affects the XDS100 with an ARM connector.

 

Can you consider this and keep us informed whether it might apply?

Best Regards,
Lisa

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