Hi Kelvin,
I hope you downloaded TIVAWare from the following link: http://www.ti.com/tool/sw-tm4c
Regards,
Gautam
Hi Kelvin,
I hope you downloaded TIVAWare from the following link: http://www.ti.com/tool/sw-tm4c
Regards,
Gautam
Hi Barry,
I've just figured out that the keyword is 'remark' and not 'info'. This will then be output in the CCS 5.5 'Advice' tab rather than the 'Problems' tab.
Regards, Tony.
Hi
I am using CCS 5.5.
I have a makefile.targets which defines depandancies for the pre-build step. If this makefile.targets fails (because of no rule to make target for example), the error parser does not report the remark that I can quite clearly see is in my console output.
Can I get the error parser to parse the pre-build makefile.targets output?
Regards, Tony.
Try programming the EEPROM of FTDI. Refer this link thoroughly:
Regards,
Gautam
Hi,
I added a path using Window->Preferences->Workspace->Linked Resources but I don't see the new path appear in the "includes" folder in the project. Is there something else I need to do?
thank you,
Scott
Good day experts,
I was hoping you could provide me with some insight into how I can effectively debug two DSP cores simultaneously.
We intend to develop a board containing a C6748 main processor and a C66x co-processor for high capacity processing. To save on hardware costs we intend to daisy chain the JTAG interfaces of the DSPs, so that only a single emulator can be used, as opposed to an independent emulator for each DSP.
Hardware wise, I know that this configuration is possible, so this is not really a problem.
From a software point of view, I am a bit unsure how simultaneous debugging in CCS 5.5 would work.
Obviously two separate projects would be necessary for each DSP, but I believe it would make sense to put these two projects in the same CCS workspace since they will be sharing some platform independent code. When developing on this platform, it would be desirable to load the applications to both DSPs at once with a single emulator and potentially set debug points on both DSPs.
I am assuming this will be possible?
Hi,
thanks for the update and glad to hear.
All the best with development.
Best Regards,
Lisa
Hi Nandish,
odd. a v6 license should work normally in v5 and v4 as well The only things I can think of are
- did you change servers?
- are you sure v5 is correctly pointing to the license server?
If you are sure v6 and your server are fine these are some of the only things I can imagine.
Best Regards,
Lisa
It is discussed in section 1.2.1 C/C++ Language Features. Quote:
The TMS320C28x compiler conforms to the ANSI/ISO C standard as defined by ANSI/ISO and described in Kernighan and Ritchie’s The C Programming Language (second edition).
[quote user="Nicolas"]I would like to know if the compiler C2000 v4.1.3 is ISO C89 or ISO C99?[/quote]
Speaking in these terms, it is C89. Some C99 features may be supported, but many are not. Note version 4.1.3 is over 8 years old. More recent information on this topic can be found in this wiki article, but much of it does not apply to such an old release.
Thanks and regards,
-George
[quote user="Nicolas"]I need to know if these 2 compilers come from the same origin compiler (the same source code)?[/quote]
No. The TI compiler is not based on GCC. I don't anything about the Tasking compiler.
Thanks and regards,
-George
Hi Scott,
I created a new post for you. This is always better and more efficient for getting help.
Yes, that is where you add paths for linked variables only.
To add an include path it is in the compilers "include options" . Project->properties->xxxx compiler->include options.
Libraries get added in the linkers "file search path"
See this useful wiki
http://processors.wiki.ti.com/index.php/Include_paths_and_options
Best Regards,
Lisa
Hi Peiter,
The TINA-TI model has been released to the product folder. You can download it from under "Tools and Software" tab.
http://www.ti.com/product/LMR14206/toolssoftware
Thanks,
Hi,
This might also be of interest to you. There are a a lot of differences between the two versions but in the project menu there is an import legacy project option.
http://processors.wiki.ti.com/index.php/Migrating_to_CCSv5
Best Regards,
Lisa
The assembler does predefine some constants, though none of the ones you mention here. You can see the list in the assembly tools manual. If you use the TI ARM compiler tools, for example, then you would look in the section titled Predefined Symbolic Constants in this manual. Since these constants are not predefined by the assembler, they must be explicitly defined somewhere in the software package you are using. I would expect these constants to be explained in the documentation for that software package.
Thanks and regards,
-George
With our current ARM compiler if you turn on symbolic debug it will put in as much debug info as it can without impacting optimization. The behavior is different in our older compilers where the debug info generation would take precedence and impact optimization.
This would mean that if you need more debug info you could reduce the optimization level for the file containing that function. By doing it at the file level you will have less impact on the rest of the application. If you do hit this problem later the team in the compiler forum can help you through it.
Regards,
John
Antony,
Capturing output from file is one of the big limitations of GEL. The output goes to the console in CCS. If you move the commands to your DSS script you can use the traceWrite commands there which will end up in the log.
Regards,
John
There is an alternate browser that could be used. You would need to open ccstudio.ini file in a text editor located at CCSInstallRoot\ccsv6\eclipse directory and add
-DTIBrowserType=swt
somewhere after -vmargs line.
The crash is most likely due to chromium missing libudev.so.0 library. see this link for more information:
https://github.com/rogerwang/node-webkit/wiki/The-solution-of-lacking-libudev.so.0
If you wanted to pursue options described on above page, then you would need to install and link "libudev-dev:i386" package. i.e. 32bit version of libudev because CCS is a 32 bit application.
Martin
The macro __FUNCTION__ is supported in the ARM 5.1.x compiler. What compiler options are you using?
Hi there,
I am using CCSv6 on Windows 7 with the TMS320C6713.
I've been reading the memory management sections from the "C6000 Integration Workshop Student Guide" Revision 3.1a but I have some questions I would love help with.
Below is my current C6713.cmd file. Originally all the sections were allocated to IRAM. I understand that this is supposed to be customized, but how much are you able to change? Are you allowed to change the addresses in the MEMORY{} block? If they aren't dictated by hardware constraints then by how much can you expand or contract them?
Also, I would appreciate it if you could help me with what Sections should be using which Memory. The workshop pdf touches on .text, .cinit, .bss, .stack, and .cio, but it doesn't speak of the others. There were four errors when building the code with sections that wouldn't fit into IRAM. I corrected three of these (as you can see in the cmd below, I put .text in flash because of the workshop but it didn't have an error ) but I don't know what to do with the .far. It is size 0x4046c which is larger than the entire IRAM is.
This leads back to my original questions. To fix this should I change .far to another memory location, if so how do I know which one? Or should I change IRAM (that doesn't sound possible)?
Thank you very much for any help you can give me!
/****************************************************************************/ /* C6713.cmd */ /* Copyright (c) 2010 Texas Instruments Incorporated */ /* Author: Rafael de Souza */ /* */ /* Description: This file is a sample linker command file that can be */ /* used for linking programs built with the C compiler and */ /* running the resulting .out file on an TMS320C6713 */ /* device. Use it as a guideline. You will want to */ /* change the memory layout to match your specific C6xxx */ /* target system. You may want to change the allocation */ /* scheme according to the size of your program. */ /* */ /****************************************************************************/ MEMORY { IRAM o = 0x00000000 l = 0x00030000 /* 192kB - Internal RAM */ L2RAM o = 0x00030000 l = 0x00010000 /* 64kB - Internal RAM/CACHE */ EMIFCE0 o = 0x80000000 l = 0x10000000 /* SDRAM in 6713 DSK */ EMIFCE1 o = 0x90000000 l = 0x10000000 /* Flash/CPLD in 6713 DSK */ EMIFCE2 o = 0xA0000000 l = 0x10000000 /* Daughterboard in 6713 DSK */ EMIFCE3 o = 0xB0000000 l = 0x10000000 /* Daughterboard in 6713 DSK */ } // These were all IRAM initially before I changed them SECTIONS { .text > EMIFCE1 .stack > IRAM .bss > IRAM .cio > EMIFCE0 .const > IRAM .data > IRAM .switch > IRAM .sysmem > EMIFCE0 .far > IRAM .args > IRAM .ppinfo > IRAM .ppdata > IRAM /* COFF sections */ .pinit > IRAM .cinit > EMIFCE1 /* EABI sections */ .binit > IRAM .init_array > IRAM .neardata > IRAM .fardata > IRAM .rodata > IRAM .c6xabi.exidx > IRAM .c6xabi.extab > IRAM }