Quantcast
Channel: Tools
Viewing all articles
Browse latest Browse all 91752

Forum Post: RE: xds100v2 putting overvoltage on CPLD?

$
0
0

Hi,

Thank you for the information. We reached the same conclusion as you; some measurements I did showed VBUS injected into pin 16 of the FPGA, which is void by the device specifications. This will be fixed in a future revision of the schematics and I need to check how this will be communicated to the third party manufacturers.

I will also post a remark on the XDS100 wiki page for current users.

The simplest way to workaround this is to add a 10kΩ resistor in the trace that connects R31 (5.1kΩ) to pin 16 of the XC2C32A. This voltage divider would then bring down the voltage to 3.3V.

Despite this, the fact that I (and several others) have XDS100v2 emulators in fully working order for several years now probably attests for the quality of the FPGA device itself. 

Thank you again and I apologize for the inconvenience.

Regards,

Rafael


Viewing all articles
Browse latest Browse all 91752

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>