Hooman,
Nope, I have to keep the wave square enough that the oversampling by the ADC sees the same value at the bottom as well as top of the square wave, as opposed to seeing a triangle-like sawtooth. I'll adjust caps to make sure I'm not rounded. I can look at variation (even std deviation) of ADC samples to see if there's too much fall or rise on those bottoms and tops, respectively.
I'll stick with 0.5 of the 100nVp-p, or 50nV.
NOTE: I did it all on paper first, and found that the feedback resistor was the A NUMBER ONE noise source out of everything. Nothing else really had much of an impact. This included using a NON-IDEAL opamp with Id, In, Vos and En terms. This simulation show reasonable consistency with the paper calculations. The paper calculations said the output noise would be around 40.7nV, due mostly to the 100k resistor's [Johnson noise]. Meanwhile, the simulated output, prior to RC filter that actually adds noise at these levels, appears to be falling torward that same value. CONSISTENCY. It's in fact 44.2nV at 10Hz as it falls toward 40.7nV at higher frequencies. For LOWER frequencies, however, the paper calculations remain flat at 40.7nV while the simulation rises. Yes, a 1/f rise. So maybe my paper doesn't include the 1/f noise of the opamp. I'll go back next and check that. If I can get the paper and simulations matching at lower frequencies, it adds greater confidence. This can also relieve problems of moving the start frequency lower and lower not stabilizing for the simulation.
Thanks for all your help.
-Helmut