Dear supporters:
For performance concern, I 'd like to copy data from RAM to A8 Cortex L2 cache way via Preload Engine(PLE).
I am currently stuck on writing the virtual address to the PLE (3.2.64 c11).
I suppose that the general purpose registers, r0, r1...,rN can be used to pass arguments to
assembly function, so I wrote a simple *.asm file to write start address
to PLE c5 register as below:
.global Write_PLEStartAddress
Write_PLEStartAddress:
mcr p15,#0,r0,c11,c5,#0
The buffer address of lut_data, the passing argument after calling
Write_PLEStartAddress(lut_data );
is 0x80240158 (r0 shows correctly on CCS register view)
However, after I wrote the PLE start address and read back from registers by issuing the cmd,
mrc p15,#0,r0,c11,c5,#0
bx lr
I got 0x80240178 or 0x8024016C, but never 0x80240158.
Could someone has any idea about why is this happening?
My platform info: TMS320DM8148 (Vision-Mid)
600-MHz ARM® Cortex™-A8 RISC MPU
500-MHz C674x™ VLIW DSP
200-MHz M3-ISS/M3-HDVPSS
Best regards,
Joey from Altek