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Forum Post: RE: Multi-core debuging with use of MSMemory in simulator mode

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I found only one document describing using of Debugging Shared Memory Systems:

http://www.ti.com/lit/an/spra754/spra754.pdf

But it is old and refers to CCSv2.

So. Here there is a recommendation to use the command:

GEL_MapAddStr(start address, page, length, “string”, waitstate)

Thesis from there:

"...If an application is linked into the entire shared memory section, the GEL entries to Code
Composer Studio look like:


Core 1: GEL_MapAddStr(0x08000,0,0x8000,”RAM|SH1C”,0);
           GEL_MapAddStr(0x18000,0,0x8000,”RAM|SH2C”,0);
           GEL_MapAddStr(0x28000,0,0x8000,”ROM|SH3C”,0);
           GEL_MapAddStr(0x38000,0,0x8000,”ROM|SH4C”,0);
Core 2: GEL_MapAddStr(0x08000,0,0x8000,”ROM|SH1C”,0);
           GEL_MapAddStr(0x18000,0,0x8000,”ROM|SH2C”,0);
           GEL_MapAddStr(0x28000,0,0x8000,”RAM|SH3C”,0);
           GEL_MapAddStr(0x38000,0,0x8000,”RAM|SH4C”,0);

..."

But my attempts to use this command in a file tsim_init_c6670.gel while using CCSv5 leads to error


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