Dear Supporters:
I intend to copy data from RAM to A8 Cortex L2 cache way via Preload Engine(PLE).
I am currently stuck on writing the virtual address to the PLE CP15(3.2.64 c11). I wrote an api as below,
but the TI compiler has complained about its format. Could anyone provide expertise on how to fix
this problem?
void Write_PLEStartAddress (UINT32 start_addr)
{
asm volatile(" mcr p15, #0, %0, c11, c5, #0" :: "r"(start_addr));
}
compiler error,
"
line 1266: error: expected a "("
line 1266: error: expected a ")"
"
My platform info: TMS320DM8148 (Vision-Mid)
600-MHz ARM® Cortex™-A8 (r3p2)RISC MPU
500-MHz C674x™ VLIW DSP
200-MHz M3-ISS/M3-HDVPSS
Thank you in advance,
Joey from Altek