Martin,
Per your description you are probably using an ARM processor, right? If so, CCS does not have anything specific that shows the status of the core when entering an exception - however, this is documented by ARM itself on their documentation.
Please check the reference below for Cortex A8, for example:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344k/Beifighh.html
Hope this helps,
Rafael