I'm running Beaglebone black with CCS5 using the XDS200 so far is good, I compile all support libraries from AM335X_StarterWare_02_00_01_01 and have all the demos running, but I have two issues that I don't know what is the cause or the solution.
When I compile the echoUART sample I have to choices either to use the uartEcho.cmd or the AM3359.cmd, basically I understand the difference, the first will use the initialization set on the system.lib which come from the Starterware and the other will initialize from the standard libraries of the compiler.
So far so good.
The first issue is that when I use the AM3359.cmd, interrupts wont work with the program, because the initialization is different. (see init.asm vs. boot.asm), everything else is fine. But when I use the uartEcho.cmd the program loads in the DDR memory (address 0x80000000) but wont run, crash. I Try to modify the uartEcho.cmd to run from DDR and I have the same problem. When I Load from SRAM , I wrote a little test to read and write in address 0x80000000 and everything seems fine.
The second issue is when I put the .text and the .stack in the same memory group I have an exception trigger whn I try to enable the interrupts, otherwise I works fine.
Following is the uartECHO.cmd I modify from the 2 that I have with the samples. Changing .text to DDR0 or L3OCMC0 will give you the problems I mention.
Thank you in advance for any help in this mater.
-stack 0x0008 /* SOFTWARE STACK SIZE */ -heap 0x2000 /* HEAP AREA SIZE */ /* Since we used 'Entry' as the entry-point symbol the compiler issues a */ /* warning (#10063-D: entry-point symbol other than "_c_int00" specified: */ /* "Entry"). The CCS Version (5.1.0.08000) stops building from command */ /* line when there is a warning. So this warning is suppressed with the */ /* below flag. */ -e Entry --diag_suppress=10063 /* SPECIFY THE SYSTEM MEMORY MAP */ MEMORY { #ifndef M3_CORE /* A8 memory map */ SRAM: o = 0x402F0400 l = 0x0000FC00 /* 64kB internal SRAM */ L3OCMC0: o = 0x40300000 l = 0x0000FC00 /* 64kB L3 OCMC SRAM */ M3SHUMEM: o = 0x44D00000 l = 0x00004000 /* 16kB M3 Shared Unified Code Space */ M3SHDMEM: o = 0x44D80000 l = 0x00002000 /* 8kB M3 Shared Data Memory */ DDR0: o = 0x80000000 l = 0x40000000 /* 1GB external DDR Bank 0 */ #else /* M3 memory map */ M3UMEM: o = 0x00000000 l = 0x00004000 /* 16kB M3 Local Unified Code Space */ M3DMEM: o = 0x00080000 l = 0x00002000 /* 8kB M3 Local Data Memory */ M3SHUMEM: o = 0x20000000 l = 0x00004000 /* 16kB M3 Shared Unified Code Space */ M3SHDMEM: o = 0x20080000 l = 0x00002000 /* 8kB M3 Shared Data Memory */ #endif } SECTIONS { #ifndef M3_CORE /* A8 memory map */ .text > SRAM .stack > L3OCMC0 .bss > L3OCMC0 /* GLOBAL & STATIC VARIABLES */ RUN_START(bss_start) RUN_END(bss_end) .cio > L3OCMC0 .const > L3OCMC0 .data > L3OCMC0 .switch > L3OCMC0 .sysmem > L3OCMC0 .far > L3OCMC0 .args > L3OCMC0 .ppinfo > L3OCMC0 .ppdata > L3OCMC0 /* TI-ABI or COFF sections */ .pinit > L3OCMC0 .cinit > L3OCMC0 /* EABI sections */ .binit > L3OCMC0 .init_array > L3OCMC0 .neardata > L3OCMC0 .fardata > L3OCMC0 .rodata > L3OCMC0 .c6xabi.exidx > L3OCMC0 .c6xabi.extab > L3OCMC0 #else /* M3 memory map */ .text > M3UMEM .stack > M3DMEM .bss > M3DMEM RUN_START(bss_start) RUN_END(bss_end) .cio > M3DMEM .const > M3UMEM .data > M3DMEM .switch > M3DMEM .sysmem > M3DMEM .far > M3DMEM .args > M3DMEM .ppinfo > M3DMEM .ppdata > M3DMEM /* TI-ABI or COFF sections */ .pinit > M3UMEM .cinit > M3UMEM /* EABI sections */ .binit > M3UMEM .init_array > M3UMEM .neardata > M3DMEM .fardata > M3DMEM .rodata > M3UMEM .c6xabi.exidx > M3UMEM .c6xabi.extab > M3UMEM #endif }