Forum Post: RE: System and User mode registers are missing in CCS debuger

Hi,

I still don't understand the above answer.

When the processor is in say IRQ mode, the SP/LR/SPSR shown in the "Core Registers" are actually the SP_IRQ,LR_IRQ and SPSR_IRQ. But where can I see SP_USR, LR_USR and CPSR?

I also don't see such registers in "ccsv5\ccs_base\common\targetdb\Modules\cortexA8_NotVisible.xml" (I'm using CortexA8).

This demonstrates all the registers that ARM has (including banked):

Regards,
Vasili